MC68HC908LB8_05 Datasheet, PDF(38/234 Page) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

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MC68HC908LB8_05 Datasheet, PDF (38/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

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Memory

1. Set the ERASE bit, and clear the MASS bit in the FLASH control register.

2. Read the FLASH block protect register.

3. Write any data to any FLASH location within the address range of the block to be erased.

4. Wait for a time, tNVS (minimum 10 Âµs)

5. Set the HVEN bit.

6. Wait for a time, tErase (minimum 1 ms or 4 ms)

7. Clear the ERASE bit.

8. Wait for a time, tNVH (minimum 5 Âµs)

9. Clear the HVEN bit.

10. After a time, tRCV (typical 1 Âµs), the memory can be accessed again in read mode.

NOTE

Programming and erasing of FLASH locations cannot be performed by

code being executed from FLASH memory. While these operations must be

performed in the order shown, other unrelated operations may occur

between the steps.

CAUTION

Be aware that erasing the vector page will erase the internal oscillator trim

value at $FFC0.

It is highly recommended that interrupts be disabled during program/ erase

operations.

In applications that need more than 1000 program/erase cycles, use the 4-ms page erase specification

to get improved long-term reliability. Any application can use this 4-ms page erase specification.

However, in applications where a FLASH location will be erased and reprogrammed less than 1000 times,

and speed is important, use the 1-ms page erase specification to get a shorter cycle time.

2.6.3 FLASH Mass Erase Operation

Use this step-by-step procedure to erase entire FLASH memory to read as logic 1:

1. Set both the ERASE bit and the MASS bit in the FLASH control register.

2. Read from the FLASH block protect register.

3. Write any data to any FLASH address(1) within the FLASH memory address range.

4. Wait for a time, tNVS (minimum 10 Âµs)

5. Set the HVEN bit.

6. Wait for a time, tMErase (minimum 4 ms)

7. Clear the ERASE and MASS bits.

NOTE

Mass erase is disabled whenever any block is protected (FLBPR does not

equal $FF).

8. Wait for a time, tNVHL (minimum 100 Âµs)

1. When in monitor mode, with security sequence failed (see 19.3.2 Security), write to the FLASH block protect register instead

of any FLASH address.

MC68HC908LB8 Data Sheet, Rev. 1

38

Freescale Semiconductor

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