MC68HC908LB8_05 Datasheet, PDF (220/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Development Support
V_DD
RST
4096 + 32 BUSCLKX4 CYCLES
FROM HOST
PA0
5
FROM MCU
1
4
1
1
2
4
1
Notes:
1 = Echo delay, approximately 2 bit times
2 = Data return delay, approximately 2 bit times
4 = Wait 1 bit time before sending next byte
5 = Wait until the monitor ROM runs
Figure 19-18. Monitor Mode Entry Timing
To determine whether the security code entered is correct, check to see if bit 6 of RAM address $80 is
set. If it is, then the correct security code has been entered and FLASH can be accessed.
If the security sequence fails, the device should be reset by a power-on reset and brought up in monitor
mode to attempt another entry. After failing the security sequence, the FLASH module can also be mass
erased by executing an erase routine that was downloaded into internal RAM. The mass erase operation
clears the security code locations so that all eight security bytes become $FF (blank).
MC68HC908LB8 Data Sheet, Rev. 1
220
Freescale Semiconductor