MC68HC05V12 Datasheet, PDF (79/246 Pages) Freescale Semiconductor, Inc – HCMOS Microcontreller Unit

Freescale Semiconductor, Inc.
Low-Power Modes
WAIT Instruction
6.5 WAIT Instruction
The WAIT instruction places the MCU in a low-power mode, which
consumes more power than stop mode. In wait mode, the internal
processor clock is halted, suspending all processor and internal bus
activity. Internal timer clocks remain active, permitting interrupts to be
generated from the timer or a reset to be generated from the COP
watchdog timer. Execution of the WAIT instruction automatically clears
the I bit in the condition code register. All other registers, memory, and
input/output lines remain in their previous states.
If timer interrupts are enabled, a timer interrupt will cause the processor
to exit wait mode and resume normal operation. The timer may be used
to generate a periodic exit from wait mode.
The MCU can be brought out of wait mode by:
• A TIMER interrupt from either timer
• A serial peripheral interface (SPI) interrupt
• An IRQ pin external interrupt
• An externally generated reset
• A falling edge on any port C pin, if enabled
• A rising edge on the BDLC RXP pin
• A gauge sequence interrupt
MC68HC05V12 — Rev. 2.0
Low-Power Modes
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Technical Data