English
Language : 

MC68HC05V12 Datasheet, PDF (171/246 Pages) Freescale Semiconductor, Inc – HCMOS Microcontreller Unit
Freescale Semiconductor, Inc.
Byte Data Link Controller – Digital (BDLC–D)
BDLC CPU Interface
HEADER
DATA FIELD
CRC
TYPE 0 — NO IFR
HEADER
DATA FIELD
CRC
NB ID
TYPE 1 — SINGLE BYTE TRANSMITTED FROM A SINGLE RESPONDER
HEADER
DATA FIELD
CRC
NB ID1
ID N
TYPE 2 — SINGLE BYTE TRANSMITTED FROM MULTIPLE RESPONDERS
HEADER
DATA FIELD
CRC
NB
IFR DATA FIELD
TYPE 3 — MULTIPLE BYTES TRANSMITTED FROM A SINGLE RESPONDER
NB = Normalization Bit
ID = Identifier, usually the physical address of the responder(s)
CRC
(OPTIONAL)
Figure 14-19. Types of In-Frame Response (IFR)
TSIFR — Transmit Single Byte IFR with No CRC (Type 1 or 2) Bit
The TSIFR bit is used to request the BDLC to transmit the byte in the
BDLC data register (BDR) as a single byte IFR with no CRC.
Typically, the byte transmitted is a unique identifier or address of the
transmitting (responding) node. See Figure 14-19.
1 = If this bit is set prior to a valid EOD being received with no CRC
error, once the EOD symbol has been received the BDLC will
attempt to transmit the appropriate normalization bit followed
by the byte in the BDR.
0 = The TSIFR bit will be cleared automatically, once the BDLC
has successfully transmitted the byte in the BDR onto the
bus, or TEOD is set, or an error is detected on the bus.
If the programmer attempts to set the TSIFR bit immediately after the
EOD symbol has been received from the bus, the TSIFR bit will remain
in the reset state and no attempt will be made to transmit the IFR byte.
If a loss of arbitration occurs when the BDLC attempts to transmit and
after the IFR byte winning arbitration completes transmission, the BDLC
MC68HC05V12 — Rev. 2.0
Byte Data Link Controller – Digital (BDLC–D)
For More Information On This Product,
Go to: www.freescale.com
Technical Data