MC68HC05V12 Datasheet, PDF (46/246 Pages) Freescale Semiconductor, Inc – HCMOS Microcontreller Unit

Memory Map
Freescale Semiconductor, Inc.
Addr.
$0030
$0031
$0032
$0033
$0034
$0035
$0036
$0037
$0038
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
MINA Current Direction ^Read:
Register (DMINA)
See page 193.
Write:
0
0
0
0
0
0
0
DMIA
Reset: 0
0
0
0
0
0
0
0
MINB Current Direction ^Read:
Register (MINB)
See page 193.
Write:
0
0
0
0
0
0
0
DMIB
Reset: 0
0
0
0
0
0
0
0
MINC Current Direction ^Read:
Register (DMINC)
See page 194.
Write:
0
0
0
0
0
0
0
DMIC
Reset: 0
0
0
0
0
0
0
0
MIND Current Direction ^Read:
Register (DMIND)
See page 194.
Write:
0
0
0
0
0
0
0
DMID
Reset: 0
0
0
0
0
0
0
0
Reserved
R
R
R
R
R
R
R
R
Miscellaneous Register ^{Read: 0}
0
(MISCR)
See page 48.
Write:
OCE
Reset: 0
0
0
PWMA Data Register ^Read:
0
(PWMAD)
See page 119.
Write:
POLA
D5
Reset: 0
0
U
PWMA Control Register ^Read:
0
(PWMAC)
See page 117.
PSA1A
Write:
PSA0A
Reset: 0
0
0
PWMB Data Register ^Read:
0
(PWMBD)
See page 119.
Write:
POLB
D5
Reset: 0
0
U
= Unimplemented
0
0
0
0
0
0
0
0
0
0
D4
D3
D2
D1
D0
U
U
U
U
U
0
PSB3A PSB2A PSB1A PSB0A
0
0
0
0
0
D4
D3
D2
D1
D0
U
U
U
U
U
R = Reserved
U = Unaffected
Figure 2-3. I/O and Control Registers (Sheet 6 of 7)
Technical Data
Memory Map
For More Information On This Product,
Go to: www.freescale.com
MC68HC05V12 — Rev. 2.0