MC68HC05V12 Datasheet, PDF (38/246 Pages) Freescale Semiconductor, Inc – HCMOS Microcontreller Unit

Memory Map
Freescale Semiconductor, Inc.
$0000
0000
I/O
64 BYTES
$003F
0063
$0040
0064
USER RAM
128 BYTES
I/O
REGISTERS
64 BYTES
SEE FIGURE 2-2
$0000
$00FF
$0100
$01BF
$0240
$033F
$0340
$0CFF
$0D00
STACK RAM
64 BYTES
0255
USER RAM
0256
192 BYTES
0447
UNUSED
USER EEPROM
0576
256 BYTES
0831
UNUSED
0832
2496 BYTES
3327
3328
USER ROM
12,032 BYTES
$3BFF
$3C00
$3FEF
$3FF0
$3FFF
BOOTLOADER/ FACTORY
TEST CODE ROM
1008 BYTES
USER VECTORS ROM
16 BYTES
15359
15360
16367
16368
16383
$003F
*GAUGE VECTOR (HIGH BYTE)/
COP WATCHDOG TIMER
$3FF0
GAUGE VECTOR (LOW BYTE) ^$3FF1
8-BIT TIMER VECTOR (HIGH BYTE) ^$3FF2
8-BIT TIMER VECTOR (LOW BYTE) ^$3FF3
SPI VECTOR (HIGH BYTE)
$3FF4
SPI VECTOR (LOW BYTE)
$3FF5
BDLC VECTOR (HIGH BYTE) ^$3FF6
BDLC VECTOR (LOW BYTE) ^$3FF7
16-BIT TIMER VECTOR (HIGH BYTE) ^$3FF8
16-BIT TIMER VECTOR (LOW BYTE) ^$3FF9
IRQ VECTOR (HIGH BYTE)
$3FFA
IRQ VECTOR (LOW BYTE)
$3FFB
SWI VECTOR (HIGH BYTE)
$3FFC
SWI VECTOR (LOW BYTE)
$3FFD
RESET VECTOR (HIGH BYTE) ^$3FFE
RESET VECTOR (LOW BYTE) ^$3FFF
* Reading $3FF0 returns the gauge vector EPROM byte.
Writing a 0 to $3FF0, bit 0, resets the COP.
Figure 2-1. MC68HC05V12 Single-Chip Mode Memory Map
2.3 I/O and Control Registers
The I/O and control registers reside in locations $0000–$003F. The
overall organization of these registers is shown in Figure 2-2. The bit
assignments for each register are shown in Figure 2-3. Reading from
unimplemented bits will return unknown states, and writing to
unimplemented bits will be ignored.
Technical Data
Memory Map
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MC68HC05V12 — Rev. 2.0