MC68HC05V12 Datasheet, PDF (61/246 Pages) Freescale Semiconductor, Inc – HCMOS Microcontreller Unit

Freescale Semiconductor, Inc.
Interrupts
External Interrupt (IRQ)
through a mask option. If the edge-sensitive interrupt option is selected
for the IRQ pin, only the IRQ latch output can activate an IRQF flag which
creates an interrupt request to the CPU to generate the external interrupt
sequence.
When edge sensitivity is selected for the IRQ interrupt, it is sensitive to
these cases:
1. Falling edge on the IRQ pin
2. Falling edge on any port C pin with IRQ enabled
If the edge and level mask option is selected, the active low state of the
IRQ pin can also activate an IRQF flag which creates an IRQ request to
the CPU to generate the IRQ interrupt sequence.
When edge and level sensitivity are selected for the IRQ interrupt, it is
sensitive to these cases:
1. Low level on the IRQ pin
2. Falling edge on the IRQ pin
3. Falling edge on any port C pin with IRQ enabled
The IRQE enable bit controls whether an active IRQF flag (IRQ pin
interrupt) can generate an IRQ interrupt sequence. The IPCE enable bit
controls whether an active IPCF flag (port C interrupt) can generate an
IRQ interrupt sequence. The IRQ interrupt is serviced by the interrupt
service routine located at the address specified by the contents of
$3FFA and $3FFB.
The IRQF latch is cleared automatically by entering the interrupt service
routine to maintain compatibility with existing M6805 interrupt servicing
protocol. To allow the user to identify the source of the interrupt, the port
interrupt flag (IPCF) is not cleared automatically. This flag must be
cleared within the interrupt handler prior to exit to prevent repeated re-
entry. This is achieved by writing a logic 1 to the IRQA (IRQ
acknowledge) bit, which will clear all pending IRQ interrupts, including a
pending IRQ pin interrupt.
The interrupt request flag (IPCF) is read only and cannot be cleared by
writing to it. The acknowledge flag always reads as a logic 0. Together,
MC68HC05V12 — Rev. 2.0
Interrupts
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Technical Data