MC68HC05V12 Datasheet, PDF (234/246 Pages) Freescale Semiconductor, Inc – HCMOS Microcontreller Unit

Freescale Semiconductor, Inc.
Electrical Specifications
17.10 Serial Peripheral Interface (SPI) Timing
Num
Characteristic⁽¹⁾
Operating frequency
Master
Slave
Cycle time
1
Master
Slave
Enable lead time
2
Master⁽²⁾
Slave
Enable lag time
3
Master⁽²⁾
Slave
Clock (SCK) high time
4
Master
Slave
Clock (SCK) low time
5
Master
Slave
Data setup time (inputs)
6
Master
Slave
Data hold time (inputs)
7
Master
Slave
8
Access time (time to data active from high-impedance state)
Slave
9
Disable time (hold time to high-impedance state)
Slave
10 Data valid (after enable edge)⁽³⁾
11 Data hold time (output) (after enable edge)
Rise time (20% V_DD to 70% V_DD, C_L = 200 pF)
12
SPI outputs (SCK, MOSI, and MISO)
SPI inputs (SCK, MOSI, MISO, and SS)
Fall time (20% V_DD to 70% V_DD, C_L = 200 pF)
13
SPI outputs (SCK, MOSI, and MISO)
SPI inputs (SCK, MOSI, MISO, and SS)
1. V_DD = 5.0 Vdc ±10%, V_SS = 0 Vdc, T_A = T_L to T_H
2. Signal production depends on software.
3. Assumes 200 pF load on all SPI pins
Symbol Min Max Unit
f_OP(M)
f_OP(S)
dc
0.5 f_OP
dc
4.2 MHz
t_CYC(m)
2.0
— t_CYC
t_CYC(s)
240
— ns
t_LEAD(M) Note 2 —
ns
lLEAD(S)
240
—
t_LAG(m) Note 2 —
ns
t_LAG(s)
240
—
t_w(SCKH)m
340
—
ns
t_w(SCKH)s
190
—
t_w(SCKL)m
340
—
ns
t_w(SCKL)s
190
—
t_SU(m)
t_SU(s)
100
— ns
100
—
t_H(m)
t_H(s)
t_A
100
— ns
100
—
0
120 ns
t_DIS
—
240 ns
t_V(s)
—
240 ns
t_HO
0
— ns
t_RM
—
100 ns
t_RS
—
2.0 µs
t_FM
—
100 ns
t_FS
—
2.0 µs
Technical Data
Electrical Specifications
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MC68HC05V12 — Rev. 2.0