Z51F0410 Datasheet, PDF (68/184 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F0410
Product Specification
3.12.3 External Interrupt Flag Register (EIFLAG)
The external interrupt flag register is set to ‘1’ when the external interrupt generating condition is
satisfied. The flag is cleared when the interrupt routine is executed. Alternatively, the flag can be
cleared by writing a ‘0’ to it.
3.12.4 External Interrupt Edge Register (EIEDGE)
The External interrupt edge register determines which type of edge or level sensitive interrupt.
Initially, default value is level. For level, write ‘0’ to related bit. For edge, write ‘1’ to related bit.
3.12.5 External Interrupt Polarity Register (EIPOLA)
According to EIEDGE register, the external interrupt polarity (EIPOLA) register has a different
meaning. If EIEDGE is level type, EIPOLA is able to have Low/High level value. If EIEGDE is edge
type, EIPOLA is able to have rising/falling edge value.
3.12.6 External Interrupt Enable Register (EIENAB)
When the external interrupt enable register is written to ‘1’, the corresponding external pin interrupt is
enabled. The EIEDGE and EIPOLA register defines whether the external interrupt is activated on
rising or falling edge or level sensed.
3.12.7 Register Map
Name
IE
IE1
IE2
IE3
IP
IP1
EIFLAG
EIEDGE
EIPOLA
EIENAB
Address
A8H
A9H
AAH
ABH
B8H
F8H
ACH
ADH
AEH
AFH
Table 3.3 Register Map
Dir
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
Description
Interrupt Enable Register
Interrupt Enable Register 1
Interrupt Enable Register 2
Interrupt Enable Register 3
Interrupt Polarity Register
Interrupt Polarity Register 1
External Interrupt Flag Register
External Interrupt Edge Register
External Interrupt Polarity Register
External Interrupt Enable Register
3.13 Interrupt Register Description
The Interrupt Register is used for controlling interrupt functions. Also it has External interrupt control
registers. The interrupt register consists of Interrupt Enable Register (IE), Interrupt Enable Register 1
(IE1), Interrupt Enable Register 2 (IE2) and Interrupt Enable Register 3 (IE3). For external interrupt, it
consists of External Interrupt Flag Register (EIFLAG), External Interrupt Edge Register (EIEDGE),
External Interrupt Polarity Register (EIPOLA) and External Interrupt Enable Register (EIENAB).
3.13.1 Register description for Interrupt
IE (Interrupt Enable Register) : A8H
7
6
5
4
3
2
1
0
PS029502-0212
PRELIMINARY
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