Z51F0410 Datasheet, PDF (120/184 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F0410
Product Specification
After doing one of the actions above, write arbitrary value to I2CSR to release SCL line. In
case of 1), move to step 7. In case of 2), move to step 9 to handle STOP interrupt. In case of
3), move to step 6 after transmitting the data in I2CDR, and if transfer direction bit is ‘1’ go to
master receiver section.
9. This is the final step for master transmitter function of I2C, handling STOP interrupt. The
STOP bit indicates that data transfer between master and slave is over. To clear I2CSR, write
arbitrary value to I2CSR. After this, I2C enters idle state.
The next figure depicts above process for master transmitter operation of I2C.
Master
Receiver
SLA+R
S or Sr
SLA+W
ACK ^N
0x87 ^Y
0x86
0x22
STOP
P
0x0E
LOST
DATA
Rs
STOP
LOST LOST&
0x0F 0x1D 0x1F ^{Slave Receiver (0x1D)}
or Transmitter (0x1F)
ACK ^N
Y
0x46
0x0E
STOP
LOST
0x22
P
Other master continues
Y
Cont?
Lost? ^Y
N
0x47
STOP
0x22
P
0x0F
From master to slave /
Master command or Data Write
From slave to master
0xxx _{Value of Status Register}
ACK ^{Interrupt, SCL line is held low}
P Interrupt after stop command
LOST&
Arbitration lost as master and
addressed as slave
Figure 4.34 Formats and States in the Master Transmitter Mode
PS029502-0212
PRELIMINARY
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