Z51F0410 Datasheet, PDF (165/184 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F0410
Product Specification
8.4 Serial In-System Program Mode
Serial in-system program uses the interface of debugger which uses two wires. Refer to chapter 14
in details about debugger
8.4.1 Flash operation
Configuration(This Configuration is just used for follow description)
7
6
5
4
-
FEMR[4] & [1] FEMR[5] & [1]
-
-
ERASE&VFY PGM&VFY
-
3
2
-
FEMR[2]
-
OTPE
1
FECR[6]
AEE
0
FECR[7]
AEF
Master Reset
Page Buffer Reset
Page Buffer Load(0X00H)
In the case of OTP
OTPE flag Set
Erase
Page Buffer Reset
Page Buffer Load
In the case of OTP
OTPE flag Set
Erase Latency(500us)
Page Buffer Reset
Configuration Reg. setting
Cell Read
No
Pass/Fail?
Yes
Configuration Reg. Clear
Program
Pgm Latency(500us)
Page Buffer Reset
Configuration Reg. setting
Cell Read
Pass/Fail?
Figure 8.5 The sequence of page program and erase of Flash memory
PS029502-0212
PRELIMINARY
162