Z51F0410 Datasheet, PDF (100/184 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

4.6.2 Block Diagram
Z51F0410
Product Specification
SCLK
UBAUD
XCK
Master
XCK
Control
Clock Sync
Logic
Baud Rate Generator
UMSEL[1:0]
RXC
Rx Interrupt
I
RXD/
MISO
M
U
M
U
X
X
Rx
Control
n
t
Clock
e
Recovery
r
n
a
l
Data
Recovery
Receive Shift Register
(RXSR)
M
U
X
B
u
s
UMSEL1&UMSEL0
Master
DOR/PE/FE
UDATA[0]
L
Checker
(Rx)
i
Stop bit
Generator
UPM0
n
UDATA[1]
UMSEL0
e
(Rx)
TXD/
MOSI
D
E
P
D
E
P
Tx
Control
Parity
M
Generator
U
X
Transmit Shift Register
(TXSR)
M
U
X
UPM1
UDATA(Tx)
SS
SS
Control
TXC
Rx Interrupt
UCTRL1
UCTRL2
UCTRL3
USTAT
UMSEL1 UMSEL0 UPM1 UPM0 USIZE2 USIZE1 USIZE0 UCPOL
UDRIE TXCIE RXCIE WAKEIE TXE RXE USARTEN U2X
MASTER LOOPS DISXCK SPISS
-
USBS TX8 RX8
UDRE TXC RXC WAKE SOFTRST DOR FE
PE
ADDRESS
:
E2H
INITIAL VALUE : 0000_0000B
ADDRESS
:
E3H
INITIAL VALUE : 0000_0000B
ADDRESS
:
E4H
INITIAL VALUE : 0000_-000B
ADDRESS
:
E5H
INITIAL VALUE : 1000_0000B
Figure 4.18 USART Block Diagram
PS029502-0212
PRELIMINARY
97