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Z51F0410 Datasheet, PDF (175/184 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers | |||
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Z51F0410
Product Specification
OCD(ISP)
âhC
âhC
Release from worst 1.7V
Power on reset
PAD_RESETB (R02)
R05
R03
RESET_SYSB
Low period required during more 10us if external reset is used
âhC
Figure 8.10 ISP mode
8.6.2 Mode entrance of Byte-parallel
TARGET MODE
Byte-Parallel Mode
R0[7:6],R0[3],R0[1]
4âh5
R0[7:6],R0[3],R0[1]
4âhA
R0[7:6],R0[3],R0[1]
4âh5
Power on reset
PAD_RESETB (R02)
R05
R0[7],[6],[3],[1]
RESET_SYSB
Release from worst 1.7V
Low period required during more 10us if external reset is used
Sample R0[7:6],R0[3],R0[1]at the falling edge of R05
âh5
âhA
âh5
Figure 8.11 Byte-parallel mode (10pin package only)
PS029502-0212
PRELIMINARY
172
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