Z51F0410 Datasheet, PDF (132/184 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F0410
Product Specification
4.8.4 Register Map
Name
ADCM
ADCRH
ADCRL
ADCM2
Address
9AH
9BH
9CH
9BH
Table 4.16 ADC Register Map
Dir
R/W
R
R
R/W
Default
8FH
-
-
8FH
Description
A/D Converter Mode Register
A/D Converter Result High Register
A/D Converter Result Low Register
A/D Converter Mode 2 Register
4.8.5 ADC Register description
The ADC Register consists of A/D Converter Mode Register (ADCM), A/D Converter Result High
Register (ADCRH), A/D Converter Result Low Register (ADCRL), A/D Converter Mode 2 Register
(ADCM2).
Note) when STBY bit is set to ‘1’, ADCM2 can be read. If ADC enables, it is possible only to write
ADCM2.When reading, ADCRH is read.
4.8.6 Register description for ADC
ADCM (A/D Converter Mode Register) : 9AH
7
STBY
R/W
6
ADST
R/W
5
REFSEL
R/W
4
AFLAG
R/
3
ADSEL3
R/W
2
ADSEL2
R/W
1
0
ADSEL1
ADSEL0
R/W
R/W
Initial value : 8FH
STBY
ADST
REFSEL
AFLAG
ADSEL[3:0]
Control operation of A/D standby (power down)
0
ADC module enable
1
ADC module disable (power down)
Control A/D Conversion stop/start.
0
ADC Conversion Stop
1
ADC Conversion Start
A/D Converter reference selection
0
Internal Reference (VDD)
1
External Reference(AVREF, AN0 disable)
A/D Converter operation state
0
During A/D Conversion
1
A/D Conversion finished
A/D Converter input selection
ADSEL3 ADSEL2 ADSEL1 ADSEL0 Description
0
0
0
0
Channel0(AN0)
0
0
0
1
Channel1(AN1)
0
0
1
0
Channel2(AN2)
0
0
1
1
Channel3(AN3)
0
1
0
0
Channel4(AN4)
0
1
0
1
Channel5(AN5)
0
1
1
0
Channel6(AN6)
0
1
1
1
Channel7(AN7)
1
0
0
0
Channel8(N/A)
1
0
0
1
Channel9(N/A)
PS029502-0212
PRELIMINARY
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