Z51F0410 Datasheet, PDF (6/184 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F0410
Product Specification
4.3.4 Watch Dog Timer Register description.............................................................................. 75
4.3.5 Register description for Watch Dog Timer......................................................................... 75
4.3.6 WDT Interrupt Timing Waveform....................................................................................... 76
4.4 WT ........................................................................................................................................... 77
4.4.1 Overview ........................................................................................................................... 77
4.4.2 Block Diagram................................................................................................................... 77
4.4.3 Register Map..................................................................................................................... 77
4.4.4 Watch Timer Register description ..................................................................................... 77
4.4.5 Register description for Watch Timer ................................................................................ 78
4.5 Timer/PWM .............................................................................................................................. 80
4.5.1 8-bit Timer/Event Counter 0, 1 .......................................................................................... 80
4.5.2 16-Bit Timer 4 ................................................................................................................... 92
4.6 USART..................................................................................................................................... 96
4.6.1 Overview ........................................................................................................................... 96
4.6.2 Block Diagram................................................................................................................... 97
4.6.3 Clock Generation .............................................................................................................. 98
4.6.4 External Clock (XCK) ........................................................................................................ 99
4.6.5 Synchronous mode operation ........................................................................................... 99
4.6.6 Data format ....................................................................................................................... 99
4.6.7 Priority bit ........................................................................................................................ 100
4.6.8 USART Transmitter......................................................................................................... 100
4.6.9 USART Receiver............................................................................................................. 101
4.6.10 SPI Mode ...................................................................................................................... 104
4.6.11 Register Map................................................................................................................. 106
4.6.12 USART Register description ......................................................................................... 107
4.6.13 Register description for USART .................................................................................... 107
4.6.14 Baud Rate setting (example)......................................................................................... 110
4.7 I2C ......................................................................................................................................... 112
4.7.1 Overview ......................................................................................................................... 112
4.7.2 Block Diagram................................................................................................................. 112
4.7.3 I2C Bit Transfer............................................................................................................... 112
4.7.4 START / REPEATED START / STOP............................................................................. 113
4.7.5 DATA TRANSFER .......................................................................................................... 113
4.7.6 ACKNOWLEDGE............................................................................................................ 114
4.7.7 SYNCHRONIZATION / ARBITRATION........................................................................... 114
4.7.8 OPERATION................................................................................................................... 115
4.7.9 Register Map................................................................................................................... 123
4.7.10 I2C Register description ................................................................................................ 123
4.7.11 Register description for I2C........................................................................................... 123
4.8 12-Bit A/D Converter .............................................................................................................. 126
4.8.1 Overview ......................................................................................................................... 126
4.8.2 Block Diagram................................................................................................................. 127
4.8.3 ADC Operation................................................................................................................ 128
4.8.4 Register Map................................................................................................................... 129
4.8.5 ADC Register description ................................................................................................ 129
4.8.6 Register description for ADC........................................................................................... 129
4.9 Analog Comparator ................................................................................................................ 132
4.9.1 Overview ......................................................................................................................... 132
PS029502-0212
PRELIMINARY
3