Z51F0410 Datasheet, PDF (140/184 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F0410
Product Specification
5. Power Down Operation
5.1 Overview
The Z51F0410 MCU features three power-down modes to minimize the power consumption of the
device. In power down mode, power consumption is reduced considerably. The device provides three
kinds of power saving functions, IDLE, STOP1 and STOP2 mode. In three modes, program is
stopped.
5.2 Peripheral Operation In IDLE/STOP Mode
Table 5.1 Peripheral Operation during Power Down Mode.
Peripheral
CPU
RAM
Basic Interval
Timer
Watch Dog
Timer
Watch Timer
TimerP0~1
ADC
BUZ
SPI/SCI
I2C
Internal OSC
(8MHz)
Main OSC
(1~8MHz)
Sub OSC
(32.768kHz)
Internal
RCOSC
(128kHz)
I/O Port
Control
Register
Address Data
Bus
Release
Method
IDLE Mode
ALL CPU Operation
are Disable
Retain
Operates
Continuously
Operates
Continuously
Operates
Continuously
Operates
Continuously
Operates
Continuously
Operates
Continuously
Operates
Continuously
Operates
Continuously
Oscillation
Oscillation
Oscillation
Oscillation
Retain
Retain
Retain
By RESET, all
Interrupts
STOP1 Mode
ALL CPU Operation are Disable
Retain
Operates Continuously
Operates Continuously
Stop (Only operate in sub clock mode)
Halted (Only when the Event Counter
Mode is Enable, Timer operates
Normally)
Stop
Stop
Only operate with external clock
Stop
Stop
Stop
Oscillation
Oscillation
Retain
Retain
Retain
By RESET, Timer Interrupt (EC0), SIO
(External clock), External Interrupt,
UART by ACK PCI, I2C (slave mode),
WT (sub clock),WDT, BIT
STOP2 Mode
ALL CPU Operation are Disable
Retain
Stop
Stop
Stop (Only operate in sub clock mode)
Halted (Only when the Event Counter
Mode is Enable, Timer operates
Normally)
Stop
Stop
Only operate with external clock
Stop
Stop
Stop
Oscillation
Stop
Retain
Retain
Retain
By RESET, Timer Interrupt (EC0), SIO
(External clock), External Interrupt,
UART by ACK PCI, I2C (slave mode),
WT (sub clock)
5.3 IDLE mode
The power control register is set to ‘01h’ to enter the IDLE Mode. In this mode, the internal oscillation
circuits remain active. Oscillation continues and peripherals are operated normally but CPU stops. It is
released by reset or interrupt. To be released by interrupt, interrupt should be enabled before IDLE
mode. If using reset, because the device becomes initialized state, the registers have reset value.
PS029502-0212
PRELIMINARY
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