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Z51F0410 Datasheet, PDF (145/184 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers
Z51F0410
Product Specification
6. RESET
6.1 Overview
The Z51F0410 MCU features reset by external RESETB pin. The following is the hardware setting
value.
Table 6.1 Reset state
On Chip Hardware
Program Counter (PC)
Accumulator
Stack Pointer (SP)
Peripheral Clock
Control Register
Brown-Out Detector
Initial Value
0000h
00h
07h
On
Peripheral Registers refer
Enable
6.2 Reset source
The Z51F0410 MCU features five types of reset generation procedures. The following is the reset
sources.
- External RESETB
- Power ON RESET (POR)
- WDT Overflow Reset (In the case of WDTEN = `1`)
- BOD Reset (In the case of BODEN = `1 `)
- OCD Reset
6.3 Block Diagram
Ext RESET
Disable by FUSE
BOD_OUT
BOD Enable
WDT RST
WDT RST
WDT RSTEN
WDT RST
RESET Noise
Canceller
RESET Noise
Canceller
SQ
R
IFBIT
(BIT Overflow)
Internal
Reset
Figure 6.1 RESET Block Diagram
6.4 RESET Noise Canceller
The Figure 6.2 is the noise canceller diagram for noise cancel of RESET. It has the noise cancel
value of about 7us (@VDD=5V) to the low input of System Reset.
PS029502-0212
PRELIMINARY
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