Z51F0410 Datasheet, PDF (143/184 Pages) Zilog, Inc. – Z8051 Series 8-Bit Microcontrollers

Z51F0410
Product Specification
5.5 Release Operation of STOP1, 2 Mode
After STOP1, 2 mode is released, the operation begins according to content of related interrupt
register just before STOP1, 2 mode start (Figure 5.3). Interrupt Enable Flag of All (EA) of IE should be
set to `1`. Released by only interrupt which each interrupt enable flag = `1`, and jump to the relevant
interrupt service routine.
SET SCCR.7
SET PCON[1:0]
SET IEx.b
STOP1, 2 Mode
Interrupt Request
Corresponding Interrupt
Enable Bit(IE, IE1, IE2, IE3)
N
IEX.b==1 ?
Y
STOP1, 2 Mode
Release
Interrupt Service
Routine
Nest Instruction
Figure 5.3 STOP1, 2 Mode Release Flow
5.5.1 Register Map
Name
Address
Table 5.2 PCON Register Map
Dir
Default
Description
PS029502-0212
PRELIMINARY
140