SMJ320F240 Datasheet, PDF (9/99 Pages) Texas Instruments – DSP CONTROLLER

SMJ320F240
DSP CONTROLLER
Terminal Functions (Continued)
SGUS029 – APRIL 1999
TERMINAL
NAME
NO.
TYPE†
DESCRIPTION
TEST SIGNALS (CONTINUED)
TRST
IEEE standard test reset. TRST, when active low, gives the scan system control of the operations of
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I
the device. If this signal is not connected or driven low, the device operates in its functional mode, and
the test reset signals are ignored.
EMU0
Emulator pin 0. When TRST is driven low, EMU0 must be high for activation of the OFF condition.
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I/O/Z When TRST is driven high, EMU0 is used as an interrupt to or from the emulator system and is defined
as input/output through the scan.
EMU1/OFF
Emulator pin 1/disable all outputs. When TRST is driven high, EMU1/OFF is used as an interrupt to
or from the emulator system and is defined as input/output through JTAG scan. When TRST is driven
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I/O/Z
low, this pin is configured as OFF. When EMU1/OFF is active low, it puts all output drivers in the
high-impedance state. OFF is used exclusively for testing and emulation purposes (not for
multiprocessing applications); therefore, for OFF condition, the following conditions apply: TRST =
low, EMU0 = high, EMU1/OFF = low.
RESERVED
42
I
Reserved for test. This pin has an internal pulldown and must be left unconnected for the ’F240.
† _{I = input, O = output, Z = high impedance}
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