SMJ320F240 Datasheet, PDF (20/99 Pages) Texas Instruments – DSP CONTROLLER

SMJ320F240
DSP CONTROLLER
SGUS029 – APRIL 1999
hardware-generated interrupts (continued)
To DSP INT6
To DSP INT5
NC
NC
NC
To DSP INT1
To DSP NMI
INT6
INT5
INT4
INT3
INT2
INT1
NMI
IRQ6
IACK6
IRQ5
IACK5
System Module
IRQ4 IACK4 IRQ3 IACK3 IRQ2 IACK2 IRQ1
IACK1
IRQ_NMI
IACK_NMI
Dual ADC
Interrupt
SPI
Interrupt
(low priority)
NC NC
NC NC
NC NC
System-Module
External Interrupt
XINT1
(high priority)
System-Module
External Interrupt
NMI
System-Module
External Interrupt
XINT1
(low priority)
SCI
Receiver
Interrupt
(low priority)
System-Module
External Interrupt
XINT2
(high priority)
System-Module
External Interrupt
XINT2
(low priority)
SCI
Transmitter
Interrupt
(low priority)
System-Module
External Interrupt
XINT3
(high priority)
System-Module
External Interrupt
XINT3
(low priority)
Watchdog
Timer
Interrupt
SPI
Interrupt
(high priority)
SCI
Receiver
Interrupt
(high priority)
Legend:
NC = No connection
IACK = interrupt acknowledge
IRQ = interrupt request
SCI
Transmitter
Interrupt
(high priority)
Figure 6. System-Module Interrupt Structure
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