SMJ320F240 Datasheet, PDF (12/99 Pages) Texas Instruments – DSP CONTROLLER

SMJ320F240
DSP CONTROLLER
SGUS029 – APRIL 1999
device memory map (continued)
Program
Hex
0000
003F
0040
Interrupts
(External)
External
FDFF
FE00
FEFF
FF00
On-Chip DARAM B0
(CNF = 1)
or
External (CNF = 0)
Reserved
FFFF
MP/MC = 1
Microprocessor
Mode
Program
Hex
0000
003F
0040
3FFF
4000
Interrupts
(On-Chip)
On-Chip
Flash EEPROM†
(8 x 2K Segments)
External
FDFF
FE00 _{On-Chip DARAM B0}
(CNF = 1)
or
FEFF ^{External (CNF = 0)}
FF00
Reserved
FFFF
†Flash _{memory includes}
address range 0000h–003Fh
MP/MC = 0
Microcomputer
Mode
I/O
Hex
0000
External
FEFF
FF00
FF0E
FF0F
FF10
FFFE
FFFF
Reserved
Flash Control
Mode Register
Reserved
Wait-state Generator
Control Register
Hex
0000
005F
0060
007F
0080
Data
Memory-Mapped
Registers and
Reserved
On-Chip
DARAM B2
Reserved
01FF
0200
On-Chip DARAM B0
(CNF = 0)
or
Reserved (CNF = 1)
02FF
0300
03FF
0400
07FF
0800
6FFF
7000
73FF
7400
743F
7440
77FF
7800
7FFF
8000
FFFF
On-Chip
DARAM B1
Reserved
Illegal
Peripheral Memory-
Mapped Registers
(System, WD,
ADC, SPI, SCI,
Interrupts, I/O)
Peripheral
Memory-Mapped
Registers
(Event Manager)
Reserved
Illegal
External
Figure 1. SMJ320F240 Memory Map
12
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