SMJ320F240 Datasheet, PDF (71/99 Pages) Texas Instruments – DSP CONTROLLER

SMJ320F240
DSP CONTROLLER
READY timings
SGUS029 – APRIL 1999
timing requirements^† (see Figure 29)
MIN MAX UNIT
tsu(R-CO)
Setup time, READY low before CLKOUT/IOPC1 high
14
16‡
ns
th(CO-R)
tv(R)ARD
Hold time, READY low after CLKOUT/IOPC1 high
Valid time, READY after address valid on read
0
ns
3H – 31
3H – 33§ ^ns
tv(R)AW
Valid time, READY after address valid on write
4H – 31
4H – 33§
ns
† _{The READY timings are based on one software wait state. At full speed operation, the ’F240 does not allow for single READY-based wait states.}
‡ _{MIN value for ’C240 only}
§ _{MAX values for ’C240 only}
CLKOUT/IOPC1
PS, DS, or IS
A0–A15
W/R
WE
D0–D15
STRB
tv(R)ARD
READY
tsu(R–CO)
th(CO–R)
tv(R)AW
Figure 29. READY Timings
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