SMJ320F240 Datasheet, PDF (56/99 Pages) Texas Instruments – DSP CONTROLLER

SMJ320F240
DSP CONTROLLER
SGUS029 – APRIL 1999
instruction set summary (continued)
Table 14. SMJ320F240 Instruction Set Summary (Continued)
’F240
MNEMONIC
SUBB
SUBC
SUBS
SUBT
TBLR
TBLW
TRAP
DESCRIPTION
Subtract from accumulator with borrow
Conditional subtract
Subtract from low accumulator with sign extension suppressed
Subtract from accumulator with shift specified by TREG
Table read
Table write
Software interrupt
Exclusive-OR with accumulator
XOR
Exclusive-OR immediate with accumulator with shift
Exclusive-OR immediate with accumulator with shift of 16
ZALR
Zero low accumulator and load high accumulator with rounding
WORDS/
CYCLES
1/1
1/1
1/1
1/1
1/3
1/3
1/4
1/1
2/2
2/2
1/1
MSB
0110
0000
0110
0110
1010
1010
1011
0110
1011
1011
0110
OPCODE
LSB
0100 IADD RESS
1010 IADD RESS
0110 IADD RESS
0111 IADD RESS
0110 IADD RESS
0111 IADD RESS
1110 0101 0001
1100 IADD RESS
1111 1101 SHFT
16-Bit Constant
1110 1000 0011
16-Bit Constant
1000 IADD RESS
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