SMJ320F240 Datasheet, PDF (76/99 Pages) Texas Instruments – DSP CONTROLLER

SMJ320F240
DSP CONTROLLER
SGUS029 – APRIL 1999
capture and QEP timings
CAP refers to CAP1/QEP1/IOPC4, CAP2/QEP2/IOPC5, CAP3/IOPC6, and CAP4/IOPC7.
timing requirements, [H = 0.5t_c(CO)] (see Figure 36)
tw(CAP)
Pulse duration, CAP input low/high
† _{MIN value for ’C240 only}
CAP
tw(CAP)
MIN
4H + 12
4H + 15†
MAX
UNIT
ns
Figure 36. Capture and QEP Input Timings
interrupt timings
PWM refers to PWM1/CMP1, PWM2/CMP2, PWM3/CMP3, PWM4/CMP4, PWM5/CMP5, PWM6/CMP6,
T1PWM/T1CMP, T2PWM/T2CMP, T3PWM/T3CMP, PWM7/CMP7, PWM8/CMP8, and PWM9/CMP9.
INT refers to NMI, XINT1, XINT2/IO, and XINT3/IO. PDP refers to PDPINT.
switching characteristics over recommended operating conditions for interrupts (see Figure 38)
td(PWM)PDP
PARAMETER
Delay time, PDPINT low to PWM to high-impedance state
MIN MAX UNIT
0
15 ns
timing requirements, [H = 0.5t_c(CO)] (see Figure 37 and Figure 38)
tw(INT)
tw(PDP)
td(INT)
Pulse duration, INT input low/high
Pulse duration, PDPINT input low
Delay time, INT low/high to interrupt-vector fetch
MIN
tc(SYS) + 12
2H + 18
2tc(SYS) + 4tc(CPU)
MAX
UNIT
ns
ns
ns
tw(INT)
INT
Figure 37. External Interrupt Timings
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