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SMJ320F240 Datasheet, PDF (80/99 Pages) Texas Instruments – DSP CONTROLLER
SMJ320F240
DSP CONTROLLER
SGUS029 – APRIL 1999
SPICLK
(clock polarity = 0)
PARAMETER MEASUREMENT INFORMATION
tc(SPC)M
tw(SPCH)M
tw(SPCL)M
SPICLK
(clock polarity = 1)
SPISIMO
tw(SPCL)M
tw(SPCH)M
td(SPCH-SIMO)M
td(SPCL-SIMO)M
Master Out Data Is Valid
tv(SPCH-SIMO)M
tv(SPCL-SIMO)M
tsu(SOMI-SPCL)M
tsu(SOMI-SPCH)M
SPISOMI
Master In Data
Must Be Valid
tv(SPCL-SOMI)M
tv(SPCH-SOMI)M
SPISTE†
† The SPISTE signal must be active before the SPI communication stream starts; the SPISTE signal must remain active
until the SPI communication stream is complete.
Figure 42. SPI Master Mode External Timings (Clock Phase = 0)
80
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