HD64F3337YCP16V Datasheet, PDF (91/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

2.7.2 Access to On-Chip Supporting Modules and External Devices
The on-chip supporting module registers and external devices are accessed in a cycle consisting of
three states: T₁, T₂, and T₃. Only one byte of data can be accessed per cycle, via an 8-bit data bus.
Access to word data or instruction codes requires two consecutive cycles (six states).
Figure 2.15 shows the access cycle for the on-chip supporting modules. Figure 2.16 shows the
associated pin states. Figures 2.17 (a) and (b) show the read and write access timing for external
devices.
Bus cycle
ø
Internal address
bus
Internal read
signal
Internal data bus
(read)
Internal write
signal
Internal data bus
(write)
T₁ state
T₂ state
T₃ state
Address
Read data
Write data
Figure 2.15 On-Chip Supporting Module Access Cycle
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