HD64F3337YCP16V Datasheet, PDF (315/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

13.1.2 Block Diagram
Figure 13.2 shows a block diagram of the I²C bus interface.
ø_P
PS
SCL
Noise
canceler
SDA
Noise
canceler
Clock
control
Bus state
decision
circuit
Arbitration
decision
circuit
Output data
control
circuit
STCR
ICCR
ICMR
ICSR
ICDR
Address
comparator
SAR
Legend:
ICCR: I²C bus control register
ICMR: I²C bus mode register
ICSR: I²C bus status register
ICDR: I²C bus data register
SAR: Slave address register
PS: Prescaler
STCR: Serial timer control register
Interrupt
generator
Figure 13.2 Block Diagram of I²C Bus Interface
Interrupt
request
283