HD64F3337YCP16V Datasheet, PDF (216/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

8.6 Sample Application
In the example below, the free-running timer is used to generate two square-wave outputs with a
50% duty cycle and arbitrary phase relationship. The programming is as follows:
1. The CCLRA bit in TCSR is set to 1.
2. Each time a compare-match interrupt occurs, software inverts the corresponding output level
bit in TOCR (OLVLA or OLVLB).
Write cycle:
CPU write to lower byte of FRC
T₁
T₂
T₃
ø
Internal address
bus
Internal write
signal
FRC clear signal
FRC address
FRC
N
H'0000
Figure 8.15 Square-Wave Output (Example)
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