HD64F3337YCP16V Datasheet, PDF (66/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

2.4.2 Calculation of Effective Address
Table 2.2 shows how the H8/300 calculates effective addresses in each addressing mode.
Arithmetic, logic, and shift instructions use register direct addressing (1). The ADD.B, ADDX.B,
SUBX.B, CMP.B, AND.B, OR.B, and XOR.B instructions can also use immediate addressing (6).
The MOV instruction uses all the addressing modes except program-counter relative (7) and
memory indirect (8).
Bit manipulation instructions use register direct (1), register indirect (2), or 8-bit absolute (5)
addressing to identify a byte operand, and 3-bit immediate addressing to identify a bit within the
byte. The BSET, BCLR, BNOT, and BTST instructions can also use register direct addressing (1)
to identify the bit.
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