HD64F3337YCP16V Datasheet, PDF (220/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Increment Caused by Changing of Internal Clock Source: When an internal clock source is
changed, the changeover may cause FRC to increment. This depends on the time at which the
clock select bits (CKS1 and CKS0) are rewritten, as shown in table 8.5.
The pulse that increments FRC is generated at the falling edge of the internal clock source. If
clock sources are changed when the old source is high and the new source is low, as in case no. 3
in table 8.5, the changeover generates a falling edge that triggers the FRC increment clock pulse.
Switching between an internal and external clock source can also cause FRC to increment.
Table 8.5 Effect of Changing Internal Clock Sources
No. Description
1
Low → low:
CKS1 and CKS0 are
rewritten while both
clock sources are low.
Timing
Old clock
source
New clock
source
FRC clock
pulse
FRC
2
Low → high:
CKS1 and CKS0 are
rewritten while old
Old clock
source
clock source is low and _{New clock}
new clock source is high. ^source
FRC clock
pulse
N
CKS rewrite
N+1
FRC
N
N+1
N+2
CKS rewrite
188