HD64F3337YCP16V Datasheet, PDF (63/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

2.3.2 Memory Data Formats
Figure 2.4 indicates the data formats in memory.
Word data stored in memory must always begin at an even address. In word access the least
significant bit of the address is regarded as 0. If an odd address is specified, no address error
occurs but the access is performed at the preceding even address. This rule affects MOV.W
instructions and branching instructions, and implies that only even addresses should be stored in
the vector table.
Data Type
Address
Data Format
1-bit data
7
0
Address n 7 6 5 4 3 2 1 0
Byte data
Address n MSB
LSB
Word data ^{Even address MSB}
Upper 8 bits
Odd address
Lower 8 bits
LSB
Byte data (CCR) on stack ^{Even address MSB}
CCR
LSB
Odd address MSB
CCR^*
LSB
Word data on stack ^{Even address MSB}
Odd address
LSB
Note: * Ignored on return
Legend:
CCR: Condition code register
Figure 2.4 Memory Data Formats
When the stack is addressed by register R7, it must always be accessed a word at a time. When the
CCR is pushed on the stack, two identical copies of the CCR are pushed to make a complete word.
When they are restored, the lower byte is ignored.
31