HD64F3337YCP16V Datasheet, PDF (500/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Programming and erasing in accordance with the flowcharts is achieved by setting #a, #b, #c, and
#d in the programs as shown in tables 20.9 (1) and (2). #e should be set as shown in table 20.10.
Wait state insertion is inhibited in these programs. If wait states are to be used, the setting should
be made after the program ends. The setting value for the watchdog timer (WDT) overflow time is
calculated based on the number of instructions between starting and stopping of the WDT,
including the write time and erase time. Therefore, no other instructions should be added between
starting and stopping of the WDT in this program example.
Table 20.9 (1) #a, #b, #c, and #d Setting Values for Typical Clock Frequencies with
Program Running in the On-Chip Memory (RAM)
Clock Frequency
f = 16 MHz f = 10 MHz f = 8 MHz
f = 2 MHz
Variable
Time Counter
Counter
Counter
Counter
Setting Setting Value Setting Value Setting Value Setting Value
a_(f) Programming time 15.8 µs H'001F
(initial setting value)
H'0013
H'000F
H'0003
b_(f) tvs1
4 µs
H'0B
c_(f) tvs2
2 µs
H'06
d_(f) Erase time
6.25 ms H'1869
(initial setting value)
H'07
H'04
H'0F42
H'06
H'03
H'0C34
H'02
H'01
H'030D
Table 20.9 (2) #a, #b, #c, and #d Setting Values for Typical Clock Frequencies with
Program Running in the External Device
Clock Frequency
f = 16 MHz f = 10 MHz f = 8 MHz
f = 2 MHz
Variable
Time Counter
Counter
Counter
Counter
Setting Setting Value Setting Value Setting Value Setting Value
a_(f) Programming time 15.8 µs H'000A
(initial setting value)
H'0006
H'0005
H'0001
b_(f) tvs1
4 µs
H'04
c_(f) tvs2
2 µs
H'02
d_(f) Erase time
6.25 ms H'0823
(initial setting value)
H'03
H'02
H'0516
H'02
H'01
H'0411
H'01
H'01
H'0104
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