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HD64F3337YCP16V Datasheet, PDF (14/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
Item
Programming
mode timing
Prewrite
processing
Programming
processing
EBR register
configuration
Memory map
(block
configuration)
Dual-Power-Supply Model:
H8/3337F
RES
tMDS
MD0
MD1
VPP
Min 0 µs
12 V
12 V
tMDS: 4tcyc (min.)
Required before erasing
Block corresponding to programming
address must be set in EBR1/EBR2
registers before programming
EBR1, EBR2
SB0 (128 bytes)
SB1 (128 bytes)
SB2 (128 bytes)
SB3 (128 bytes)
SB4 (512 bytes)
SB5 (1 kbyte)
SB6 (1 kbyte)
SB7 (1 kbyte)
LB0 (4 kbytes)
LB1(8 kbytes)
60 kbytes
Single-Power-Supply Model:
H8/3337F S-Mask Model
RES
tMDS
MD1,
MD1
P92,
P91,
P90
Not required
tMDS: 4tcyc (min.)
Settings at left not required
EBR2
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbyte)
EB4 (24 kbytes)
60 kbytes
LB2 (8 kbytes)
LB3 (8 kbytes)
LB4 (8 kbytes)
EB5 (16 kbytes)
Reset during
operation
LB5 (8 kbytes)
LB6 (12 kbytes)
EB6 (12 kbytes)
LB7 (2 kbytes)
EB7 (2 kbytes)
Drive RES pin low for at least 10
system clock cycles (10ø). (RES pulse
width tRESW = min. 10tcyc)
Drive RES pin low for at least 20
system clock cycles (20ø). (RES pulse
width tRESW = min. 20tcyc)