HD64F3337YCP16V Datasheet, PDF (380/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

15.5 Interrupts
The A/D converter generates an interrupt (ADI) at the end of A/D conversion. The ADI interrupt
request can be enabled or disabled by the ADIE bit in ADCSR.
15.6 Useage Notes
When using the A/D converter, note the following points:
15.6.1 Setting Ranges of Analog Power Supply Pins, Etc.
Analog Input Voltage Range: The voltage applied to analog input pins AN_n during A/D
conversion should be in the range AV_SS ≤ AN_n ≤ AV_CC (n = 0 to 7).
AV_CC and AV_SS Input Voltages: For the AV_CC input voltage, set AV_SS = V_SS. When the A/D
converter is not used, set AV_CC = V_CC and AV_SS = V_SS.
15.6.2 Notes on Board Design
In board design, digital circuitry and analog circuitry should be as mutually isolated as possible,
and layout in which digital circuit signal lines and analog circuit signal lines cross or are in close
proximity should be avoided as far as possible. Failure to do so may result in incorrect operation
of the analog circuitry due to inductance, adversely affecting A/D conversion values.
Also, digital circuitry must be isolated from the analog input signals (AN₀ to AN₇), analog
reference voltage (AV_ref), and analog power supply (AV_CC) by the analog ground (AV_SS). The
analog ground (AV_SS) should be connected to a stable digital ground (V_SS) at one point on the
board.
15.6.3 Notes on Noise
A protection circuit should be connected between AV_CC and AV_SS as shown in figure 15.7 to
prevent damage due to an abnormal voltage such as an excessive surge at the analog input pins
(AN₀ to AN₇).
Also, the bypass capacitors connected to AV_CC and AV_ref and the filter capacitors connected to
AN₀ to AN₇ must be connected to AV_SS.
If filter capacitors are connected as shown in figure 15.7, the input currents at the analog input
pins (AN₀ to AN₇) will be smoothed, which may give rise to error. Error can also occur if A/D
conversion is frequently performed in scan mode so that the current that charges and discharges
the capacitor in the sample-and-hold circuit of the A/D converter becomes greater than that input
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