HD64F3337YCP16V Datasheet, PDF (90/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Bus cycle
T₁ state
T₂ state
ø
Internal address bus
Internal read signal
Internal data bus (read)
Address
Read data
Internal write signal
Internal data bus (write)
Write data
Figure 2.13 On-Chip Memory Access Cycle
Bus cycle
T₁ state
T₂ state
ø
Address bus
Address
AS: High
RD: High
WR: High
Data bus:
High impedance state
Figure 2.14 Pin States during On-Chip Memory Access Cycle
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