HD64F3337YCP16V Datasheet, PDF (163/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

7.5.2 Register Configuration and Descriptions
Table 7.8 summarizes the port 4 registers.
Table 7.8 Port 4 Registers
Name
Port 4 data direction register
Port 4 data register
Abbreviation
P4DDR
P4DR
Read/Write
W
R/W
Initial Value
H'00
H'00
Address
H'FFB5
H'FFB7
Port 4 Data Direction Register (P4DDR)
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
P4₇DDR P4₆DDR P4₅DDR P4₄DDR P4₃DDR P4₂DDR P4₁DDR P4₀DDR
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
P4DDR is an 8-bit readable/writable register that controls the input/output direction of each pin in
port 4. A pin functions as an output pin if the corresponding P4DDR bit is set to 1, and as an input
pin if this bit is cleared to 0.
P4DDR is a write-only register. Read data is invalid. If read, all bits always read 1.
P4DDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its existing values, so if a transition to software standby mode occurs while a P4DDR bit
is set to 1, the corresponding pin remains in the output state.
If a transition to software standby mode occurs while port 4 is being used by an on-chip
supporting module (for example, for 8-bit timer output), the on-chip supporting module will be
initialized, so the pin will revert to general-purpose input/output, controlled by P4DDR and P4DR.
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