HD64F3337YCP16V Datasheet, PDF (52/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Type
Bus control
Symbol
WAIT
RD
WR
AS
Interrupt signals NMI
IRQ₀ to
IRQ₇
Operating control MD₁
MD₀
Pin No.
FP-80A, CP-84,
TFP-80C CG-84 I/O
13
25
I
17
29
O
16
28
O
15
27
O
6
17
I
18 to 20, 30 to 32, I
78 to 80, 9 to 11,
27, 28 39, 40
4,
15,
I
5
16
Name and Function
Wait: Requests the CPU to insert wait
states into the bus cycle when an
external address is accessed.
Read: Goes low to indicate that the
CPU is reading an external address.
Write: Goes low to indicate that the
CPU is writing to an external address.
Address strobe: Goes low to indicate
that there is a valid address on the
address bus.
Nonmaskable interrupt: Highest-
priority interrupt request. The NMIEG
bit in the system control register
(SYSCR) determines whether the
interrupt is recognized at the rising or
falling edge of the NMI input.
Interrupt request 0 to 7: Maskable
interrupt request pins.
Mode: Input pins for setting the MCU
mode operating mode according to the
table below.
MD₁ MD₀ Mode Description
0
0
Mode 0 Illegal setting*
0
1
Mode 1 Expanded mode
with on-chip ROM
disabled
1
0
Mode 2 Expanded mode
with on-chip ROM
enabled
1
1
Mode 3 Single-chip mode
Note: * In the H8/3337SF (S-mask model,
single-power-supply on-chip flash
memory version), the settings MD₁
= MD₀ = 0 are used when boot
mode is set. For details, see
section 21.3, On-Board
Programming Modes.
Do not change the mode pin settings while
the chip is operating.
20