HD64F3337YCP16V Datasheet, PDF (154/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Mode 2: In mode 2 (expanded mode with on-chip ROM enabled), port 2 can provide upper
address output pins and general input pins. Each pin becomes an upper address output pin if its
P2DDR bit is set to 1, and a general input pin if this bit is cleared to 0. Following a reset, all pins
are input pins. To be used for address output, their P2DDR bits must be set to 1. Figure 7.7 shows
the pin functions in mode 2.
Port 2
When P2DDR = 1
A₁₅ (output)
A₁₄ (output)
A₁₃ (output)
A₁₂ (output)
A₁₁ (output)
A₁₀ (output)
A₉ (output)
A₈ (output)
When P2DDR = 0
P2₇ (input)
P2₆ (input)
P2₅ (input)
P2₄ (input)
P2₃ (input)
P2₂ (input)
P2₁ (input)
P2₀ (input)
Figure 7.7 Pin Functions in Mode 2 (Port 2)
Mode 3: In mode 3 (single-chip mode), the input or output direction of each pin can be selected
individually. A pin becomes a general input pin when its P2DDR bit is cleared to 0, and a general
output pin when this bit is set to 1. Figure 7.8 shows the pin functions in mode 3.
Port 2
P2₇ (input/output)
P2₆ (input/output)
P2₅ (input/output)
P2₄ (input/output)
P2₃ (input/output)
P2₂ (input/output)
P2₁ (input/output)
P2₀ (input/output)
Figure 7.8 Pin Functions in Mode 3 (Port 2)
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