HD64F3337YCP16V Datasheet, PDF (558/749 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Table 21.11 Operating Mode Selection in Writer Mode
Pins
Mode
CE
OE
WE
FO7–FO0
FA17–FA0
Read
L
L
H
Data output
Ain^*2
Output disable
L
H
H
High impedance X
Command write
L
H
L
Data input
Ain^*2
Chip disable^*1
H
X
X
High impedance X
Notes: *1 Chip disable is not a standby state; internally, it is an operation state.
*2 Ain indicates that there is also address input in auto-program mode.
Table 21.12 Writer Mode Commands
1st Cycle
2nd Cycle
Command
Cycles Mode Address Data
Mode Address Data
Memory read mode 1 + n Write X
H'00
Read RA
Dout
Auto-program mode 129
Write X
H'40
Write WA
Din
Auto-erase mode
2
Write X
H'20
Write X
H'20
Status read mode
2
Write X
H'71
Write X
H'71
Notes: 1. In auto-program mode, 129 cycles are required for command writing by a simultaneous
128-byte write.
2. In memory read mode, the number of cycles depends on the number of address write
cycles (n).
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