LAN9730 Datasheet, PDF (78/222 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

LAN9730/LAN9730i
TABLE 4-54: 4B/5B CODE TABLE (CONTINUED)
Code Group
10000
Sym
V
Receiver Interpretation
INVALID, RX_ER if during RX_DV
Transmitter Interpretation
INVALID
4.6.1.2 Scrambling
Repeated data patterns (especially the IDLE code-group) can have power spectral densities with large narrow-band
peaks. Scrambling the data helps eliminate these peaks and spread the signal power more uniformly over the entire
channel bandwidth. This uniform spectral density is required by FCC regulations to prevent excessive EMI from being
radiated by the physical wiring.
The scrambler also performs the Parallel In Serial Out conversion (PISO) of the data.
4.6.1.3 NRZI and MLT-3 Encoding
The scrambler block passes the 5-bit wide parallel data to the NRZI converter where it becomes a serial 125 MHz NRZI
data stream. The NRZI is encoded to MLT-3. MLT-3 is a tri-level code where a change in the logic level represents a
code bit “1” and the logic output remaining at the same level represents a code bit “0”.
4.6.1.4 100M Transmit Driver
The MLT-3 data is then passed to the analog transmitter, which launches the differential MLT-3 signal, on outputs TXP
and TXN, to the twisted pair media via a 1:1 ratio isolation transformer. The 10Base-T and 100Base-TX signals pass
through the same transformer so that common magnetics can be used for both. The transmitter drives into the 100 
impedance of the CAT-5 cable. Cable termination and impedance matching require external components.
4.6.1.5 100M Phase Lock Loop (PLL)
The 100M PLL locks onto reference clock and generates the 125 MHz clock used to drive the 125 MHz logic and the
100Base-Tx Transmitter.
4.6.2 100BASE-TX RECEIVE
The receive data path is shown in Figure 4-18. Detailed descriptions are given in the following subsections.
FIGURE 4-18:
RECEIVE DATA PATH
RX_CLK
100M
PLL
MAC
Internal
MII 25 MHz by 4 bits
MII
25 MHz
by 4 bits
4B/5B 25 MHz by Descrambler
Decoder
5 bits
and SIPO
NRZI
Converter
MLT-3
NRZI _Converter
125 Mbps Serial
MLT-3
DSP: Timing
Recovery, Equalizer
and BLW Correction
A/D
Converter
MLT-3
Magnetics
MLT-3
RJ45
MLT-3 CAT-5
6 bit Data
DS00001946A-page 78
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