LAN9730 Datasheet, PDF (100/222 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

LAN9730/LAN9730i
The RAM Test Mode Enable (TESTEN) bit must be deasserted after programming the Descriptor RAM.
FIGURE 4-28:
DESCRIPTOR RAM EXAMPLE
FS Configuration and Interface Descriptor
FS Device Descriptor
HS Configuration and Interface Descriptor
HS Device Descriptor
Interface String Descriptor
Configuration String Descriptor
Serial Number String Descriptor
Product Name String Descriptor
Manufacturing String Descriptor
Language ID Descriptor
DATAPORT
ADDR
1E
1D
1C
1B
1A
19
18
17
16
15
14
13
12
11
10
0F
0E
0D
0C
0B
0A
9
8
7
6
5
4
3
2
1
0
= Unused Space Required For Alignment Purposes
DS00001946A-page 100
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