LAN9730 Datasheet, PDF (6/222 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

LAN9730/LAN9730i
1.2 Block Diagram
FIGURE 1-1:
BLOCK DIAGRAM
HSIC
HSIC
Interface
USB 2.0
Device
Controller
FIFO
Controller
JTAG
TAP
Controller
LAN9730/LAN9730i
SRAM
10/100
Ethernet
MAC
Ethernet
PHY
Ethernet
MII: To optional
external PHY
EEPROM
Controller
EEPROM
FIGURE 1-2:
SYSTEM DIAGRAM
CPM
RAM
7kx32
Reg
File
32x37
TAP
Controller
HSIC
I/F
M
UDC
U
X
USB
Common
Block
URX
UTX
CTL
FCT
TLI
Reg
File
128x32
SCSR
Reg
File
512x37
MAC
ETH
PHY
MII: To optional
external PHY
EEPROM
Controller
DS00001946A-page 6
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