LAN9730 Datasheet, PDF (206/222 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

LAN9730/LAN9730i
FIGURE 7-7:
MII RECEIVE TIMING
RXCLK
(INPUT)
RXD[3:0]
(INPUT)
t_hold
RXDV, RXER
(INPUT)
t_clkp
t_clkh t_clkl
t_su t_hold
t_su t_hold
t_hold
t_su
TABLE 7-19: MII RECEIVE TIMING VALUES
Symbol
t_clkp
t_clkh
t_clkl
t_su
t_hold
Description
RXCLK period
RXCLK high time
RXCLK low time
RXD[3:0], RXDV setup time to rising edge of
RXCLK
RXD[3:0], RXDV hold time after rising edge of
RXCLK
Min
40
t_clkp*0.4
t_clkp*0.4
8.0
Max
t_clkp*0.6
t_clkp*0.6
Units
ns
ns
ns
ns
Notes
Note 7-12
9.0
ns
Note 7-12
Note 7-12 Timing was designed for a system load between 10 pf and 25 pf.
DS00001946A-page 206
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