LAN9730 Datasheet, PDF (124/222 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

LAN9730/LAN9730i
6.3.4
TRANSMIT CONFIGURATION REGISTER (TX_CFG)
Address:
010h
Size:
32 bits
Bits
Description
31:3 RESERVED
2 Transmitter Enable (TX_ON)
When this bit is set, the transmitter is enabled. Any data in the TX FIFO will be
sent. This bit is cleared automatically when STOP_TX is set and the transmit-
ter is halted.
1 Stop Transmitter (STOP_TX)
When this bit is set, the transmitter will finish the current frame being read
from the TX FIFO, and will then stop transmitting. When the transmitter has
stopped, this bit will clear. All writes to this bit are ignored while this bit is high.
Note: After this bit clears, there will be no TX Ethernet frame data in the
TX data path.
0 Transmit FIFO Flush
Setting this bit will reset the TX FIFO pointers.
Type
RO
R/W
SC
SC
Default
-
0b
0b
0b
DS00001946A-page 124
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