LAN9730 Datasheet, PDF (209/222 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

LAN9730/LAN9730i
7.5.8 JTAG TIMING
This section specifies the JTAG timing of the device.
FIGURE 7-10:
JTAG TIMING
TCK (Input)
t_tckp
t_tckhl
t_tckhl
t_su
t_h
TDI, TMS (Inputs)
t_dov
t_doinvld
TDO (Output)
TABLE 7-22: JTAG TIMING VALUES
Symbol
t_tckp
t_tckhl
t_su
t_h
t_dov
t_doinvld
Description
TCK clock period
TCK clock high/low time
TDI, TMS setup to TCK rising edge
TDI, TMS hold from TCK rising edge
TDO output valid from TCK falling edge
TDO output invalid from TCK falling edge
Min
66.67
t_tckp*0.4
10
10
0
Max
t_tckp*0.6
16
Units
ns
ns
ns
ns
ns
ns
Notes
 2012-2015 Microchip Technology Inc.
DS00001946A-page 209