LAN9730 Datasheet, PDF (215/222 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

LAN9730/LAN9730i
56L Very Thin Quad Flat, No Lead Package (RT) - 8x8 mm Body [VQFN]
With 5.9x5.9 mm Exposed Pad; Punch Singulated
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
20
1
2
Y2
C2 _EV
C1
X2
EV
ØV
G1
Y1
X1
E
SILK SCREEN
RECOMMENDED LAND PATTERN
Units
Dimension Limits
Contact Pitch
E
Optional Center Pad Width
X2
Optional Center Pad Length
Y2
Contact Pad Spacing
C1
Contact Pad Spacing
C2
Contact Pad Width (X56)
X1
Contact Pad Length (X56)
Y1
Contact Pad to Center Pad (X52) G1
Thermal Via Diameter
V
Thermal Via Pitch
EV
MILLIMETERS
MIN
NOM
MAX
0.50 BSC
5.90
5.90
7.90
7.90
0.28
0.69
0.20
0.33
1.20
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing C04-2375A
 2012-2015 Microchip Technology Inc.
DS00001946A-page 215