LAN9730 Datasheet, PDF (148/222 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

LAN9730/LAN9730i
6.3.19 DATA PORT DATA 1 REGISTER (DP_DATA1)
Address:
050h
Size:
32 bits
The Data Port Data register holds the write data for a write access and the resultant read data for a read access.
Before reading the this register for the result of a read operation, the Data Port Ready bit should be checked. The Data
Port Ready bit must indicate the data port is ready. Otherwise the read operation is still in progress.
This register required when accessing the RX TLI and TX TLI RAMs. These RAMs have a width of 37 bits.
Bits
31:5 RESERVED
4:0 Data Port Data [36:32]
Description
Type
RO
R/W
Default
-
00h
DS00001946A-page 148
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