LAN9730 Datasheet, PDF (180/222 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

LAN9730/LAN9730i
6.5.1 BASIC CONTROL REGISTER
Index (In Decimal): 0
Size:
16 bits
Bits
Description
15 PHY Soft Reset
1 = PHY software reset. Bit is self-clearing. When setting this bit do not set
other bits in this register.
Note: The PHY will be in the normal mode after a PHY software reset.
14 Loopback
0 = Normal operation
1 = Loopback mode
13 Speed Select
0 = 10 Mbps
1 = 100 Mbps
Note: Ignored if Auto Negotiation is enabled (0.12 = 1).
12 Auto-Negotiation Enable
0 = Disable auto-negotiate process
1 = Enable auto-negotiate process (overrides 0.13 and 0.8)
11 Power Down
0 = Normal operation
1 = General power down mode
Note: The Auto-Negotiation Enable must be cleared before setting the
Power Down.
10 RESERVED
9 Restart Auto-Negotiate
0 = Normal operation
1 = Restart auto-negotiate process
Note: Bit is self-clearing.
8 Duplex Mode
0 = Half duplex
1 = Full duplex
Note: Ignored if Auto Negotiation is enabled (0.12 = 1).
7 Collision Test
0 = Disable COL test
1 = Enable COL test
6:0 RESERVED
Type
R/W
SC
R/W
R/W
R/W
R/W
RO
R/W
SC
R/W
R/W
RO
Default
0b
0b
1b
1b
0b
-
0b
0b
0b
-
DS00001946A-page 180
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