SAM7X128_14 Datasheet, PDF (611/662 Pages) ATMEL Corporation – ARM-based Flash MCU

 EOC[x] already active,
 DRDY already active,
 GOVRE inactive,
 previous data stored in LCDR being neither data from channel "y", nor data from channel "x".
GOVRE should be set but is not.
Problem Fix/Workaround
None
41.3.1.7 ADC: GOVRE Bit is not Set when Disabling a Channel
When disabling channel "y" at the same instant as an end of conversion on channel "x", EOC[x] and DRDY being already
active, GOVRE does not rise.
Note: OVRE[x] rises as expected.
Problem Fix/Workaround
None
41.3.1.8 ADC: OVRE Flag Behavior
When the OVRE flag (on channel i) has been set but the related EOC status (of channel i) has been cleared (by a read of
CDRi or LCDR), reading the Status register at the same instant as an end of conversion (causing the set of EOC status
on channel i), does not lead to a reset of the OVRE flag (on channel i) as expected.
Problem Fix/Workaround:
None
41.3.1.9 ADC: EOC Set although Channel Disabled
If a channel is disabled while a conversion is running and if a read of CDR is performed at the same time as an end of
conversion of any channel occurs, the EOC of the channel with the conversion running may rise (whereas it has been
disabled).
Problem Fix/Workaround
Do not take into account the EOC of a disabled channel
41.3.1.10 ADC: Spurious Clear of EOC Flag
If "x" and "y" are two successively converted channels and "z" is yet another enabled channel ("z" being neither "x" nor
"y"), reading CDR on channel "z" at the same instant as an end of conversion on channel "y" automatically clears EOC[x]
instead of EOC[z].
Problem Fix/Workaround
None.
41.3.1.11 ADC: Sleep Mode
If Sleep mode is activated while there is no activity (no conversion is being performed), it will take effect only after a
conversion occurs.
Problem Fix/Workaround
To activate sleep mode as soon as possible, it is recommended to write successively, ADC Mode Register (SLEEP) then
ADC Control Register (START bit field); to start an analog-to-digital conversion, in order put ADC into sleep mode at the
end of this conversion.
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
611