SAM7X128_14 Datasheet, PDF (28/662 Pages) ATMEL Corporation – ARM-based Flash MCU

 Protect Mode
 Easy debugging by preventing automatic operations
 Fast Forcing
 Permits redirecting any interrupt source on the fast interrupt
 General Interrupt Mask
 Provides processor synchronization on events without triggering an interrupt
9.5 Debug Unit
 Comprises:
 One two-pin UART
 One Interface for the Debug Communication Channel (DCC) support
 One set of Chip ID Registers
 One Interface providing ICE Access Prevention
 Two-pin UART
 USART-compatible User Interface
 Programmable Baud Rate Generator
 Parity, Framing and Overrun Error
 Automatic Echo, Local Loopback and Remote Loopback Channel Modes
 Debug Communication Channel Support
 Offers visibility of COMMRX and COMMTX signals from the ARM Processor
 Chip ID Registers
 Identification of the device revision, sizes of the embedded memories, set of peripherals
 Chip ID is 0x275C 0A40 (MRL A) for SAM7X512
 Chip ID is 0x275B 0940 (MRL A or B) for SAM7X256
 Chip ID is 0x275B 0942 (MRL C) for SAM7X256
 Chip ID is 0x275A 0740 (MRL A or B) for SAM7X128
 Chip ID is 0x275A 0742 (MRL C) for SAM7X128
9.6 Periodic Interval Timer
 20-bit programmable counter plus 12-bit interval counter
9.7 Watchdog Timer
 12-bit key-protected Programmable Counter running on prescaled SLCK
 Provides reset or interrupt signals to the system
 Counter may be stopped while the processor is in debug state or in idle mode
9.8 Real-time Timer
 32-bit free-running counter with alarm running on prescaled SLCK
 Programmable 16-bit prescaler for SLCK accuracy compensation
9.9 PIO Controllers
 Two PIO Controllers, each controlling 31 I/O lines
 Fully programmable through set/clear registers
 Multiplexing of two peripheral functions per I/O line
 For each I/O line (whether assigned to a peripheral or used as general-purpose I/O)
 Input change interrupt
SAM7X Series [DATASHEET] 28
6120K–ATARM–11-Feb-14